Asyst electronic embedded software development

Embedded Tool Solutions for ARM Cortex Microcontrollers

Wednesday, 09 November 2011

On-chip debugging (OCD) is a method to start, stop and read the core of a Microcontroller (MCU) or an application by having additional silicon on every MCU of a distinct manufacturer’s series. To access this specific MCU area one or more dedicated pins are used. Those are then no longer available to the developer and/or designer. These pins are referenced as the OCD interface. Often these lines can be used in multiple ways. This must be considered when designing the target hardware.

ARM Cortex uses JTAG as OCD interface. This interface was originally designed for boundary scan testing and uses at least 5 pins (plus ground).

ARM Cortex debug interfaces

For challenging real-time applications (e.g. in avionic, automotive and medical systems) the basic JTAG debug functions are not sufficient. There is no way to evaluate the real-time behaviour without elaborate and time-consuming code instrumentation, DCC usage, code analysis tools and/or expensive simulators that change the run-time behaviour of the application. Due to that development times for applications increase while the test opportunities decrease.

To improve this, ARM Cortex offers an add-on that can be licensed and included in the MCU by the MCU manufacturer: ETM = Embedded Trace Macrocell.

ETM is an add-on on ARM CORE with different characteristics that allows recording the program flow and with some restrictions data accesses. ETM is a superset of JTAG debugging and needs more dedicated pins and chip space as pure JTAG.

ARM Cortex CoreSight technology includes many new features:

Less pins are necessary because the hardware debugger can be connected by JTAG or by 2 pins only – “Serial Wire Debug” = SWD (+GND + RESET + pot. VREF). This is a major advantage on low-pin count MCUs.
SWD provides real-time watches that allow regular view and update of variable content in real-time.
To access the internal asynchronous trace functions SWDIO (=TMS) and SWDCLK (=TCLK) and an additional pin SWO (=TDO) are used. This asynchronous trace is called Serial Wire Trace (SWT). With that every 64 CPU cycles the program counter can be dumped for a snapshot of the program flow.
SWT allows to trigger on data access and to dump these values and/or program counter. In case of asynchronous trace this output is restricted by the bottle neck of the serial line that leads often to “trace hardware overflows”. Therefore trace data volume should be limited and tests should be limited to small parts of the application.
Another nice feature is the Instrumentation Trace Modul (ITM). Like a “printf” values can be written to specific virtual trace ports with a few commands in the application. These ports can be read by SWT.

JTAG Boundary Scan Test meets iSYSTEM's Debug and Emulation Tools

Friday, 04 November 2011

To cope with the challenges of future hardware components tests ( JTAG Boundary Scan Test according to IEEE 1149.1), boundary scan and JTAG emulation must be combined. For this merge extensive microcontroller knowledge is necessary. Emulator and debugger manufacturers like iSYSTEM have developed this expertise over many years. The technology partnership between GÖPEL and iSYSTEM is the catalyst for prompt preparation and integration of microcontroller knowledge into existing GOEPEL tools.

Thomas Wenzel, CEO of GOEPEL electronic, stated about the new partnership: “From the beginning it was important for us not to reinvent the wheel of JTAG/Boundary Scan Test (IEEE 1149.1), but to drive technology with smart partnerships. For that we have created another software platform called VarioTAP that allows partner companies like iSYSTEM to integrate and position their knowledge by software IP or models. Our customers rely on a generic solution that is independent from the microcontroller used and already prepared for future applications and standards.”

“For iSYSTEM the cooperation with GOEPEL is another important milestone in the implementation of our V-model strategy. Over the last years we demonstrated how traditional software development tools can be cost-saving, integrated and used in the whole software development and test process. The synergistic effects associated with the cooperation of GOEPEL and iSYSTEM and the desired penetrative cross linking of both technologies gives customers new perspectives in effective software and hardware testing aligned to current microprocessor techniques.”, stated Erol Simsek, Director Sales & Marketing of iSYSTEM AG.

Download GOEPLE electronic JTAG/Boundary Scan Test (IEEE1149.1) White Paper

On-chip debugger solution with Trace for Freescale MPC55xx

Thursday, 04 November 2010

The Freescale MPC55xx microcontroller family built on Power Architecture technology, comprises 32-bit microcontroller devices designed for engine management, advanced driver assistance, central body, and gateway applications. The Freescale MPC55xx microcontroller family is based on e200z1 core, which features a memory management unit (MMU) and the full 32-bit Power ISA instruction set as well as the ability to implement variable length encoding (VLE) instructions. A small footprint e200z0 core is added to the MPC5510 devices, which is designed to run the variable length encoding (VLE) instructions only, which delivers a high level of code density, significantly reducing memory requirements. According to the Nexus standard, MPC5500 family contains multiple Nexus clients that communicate over a single IEEEE-ISTO 5001-2003 Nexus Class 3 (or 2+) combined JTAG IEEEE 1149.1 auxiliary out interface. Combined, all of the Nexus clients are referred to as the Nexus development interface (NDI). Class 3 Nexus allows for program, data and ownership trace of the microcontroller execution without access to the external data and address buses. Class 2+ Nexus has no data trace comparing to the Class 3 Nexus. Communication to the NDI is handled via the auxiliary port and the JTAG port. Debug JTAG clock frequency must not exceed half CPU system clock frequency. iSYSTEM tools may be used as a debug system only or as a complex trace system.

On-Chip Debugger with advanced trace tool setup: iC3000 base unit + iTRACE PRO for Freescale MPC55xx

Debugging the Freescale MPC55xx

Debugg and Trace for Freescale MPC55xx

Debug features for Freescale MPC55xx

Four hardware execution breakpoints
Unlimited software breakpoints including in the internal CPU flash
Access breakpoints
Real-time memory access
Flash programming
Hot Attach
MMU support
eTPU debugging
e200z0 debugging (MPC551x)
On-Chip Nexus Trace (e200z1, e200z0, eTPU1, eTPU2, eDMA, FlexRay)
Nexus RTR Trace (e200z1 core – full 32-bit Power ISA instruction set)
Profiler
Execution Coverag

Freescale MC9S12x Microcontroller In-Circuit Emulation Solution

Thursday, 04 November 2010

The In-Circuit Emulator emulates the target CPU, which is removed from the target, as good as possible. Beside the CPU, additional logic is integrated on the POD. The amount of additional logic depends on the emulated CPU (e.g., Freescale MC9S12x) and the type of emulation. A buffer on a data bus is always used (minimal logic) and when rebuilding ports on the POD, maximum logic is used.

In-Circuit emulation tool setup: iC3000 base unit + ActivePRO POD for Freescale MC9S12x

As soon as the POD is connected to the target instead of the CPU, electrical and timing characteristics are changed. Different electrical and timing characteristics of used elements on the POD and prolonged lines from the target to the CPU on the POD contribute to different target (the whole system) characteristics. Consequentially, in worst case signal cross-talks and reflections can occur due to bad target connection, capacitance changes, etc. Beside that, pull-up and pull-down resistors are added to some signals. Pull-up/pull-down resistors are required to define the inactive state of signals like reset and interrupt inputs, while the POD is not connected to the target. Because of this, the POD can operate as standalone without the target.

Debug Features Freescale MC9S12x

Unlimited Breakpoints
Access Breakpoints
Real-time Access
Trace
Profiler
Execution Coverage

Read more about iSYSTEM Tools: Freescale MC9S12x Hardware Reference Manual

ISO 9001:2008 certified

Tuesday, 14 September 2010

Asyst Electronic has implemented and maintains a management system which meets the requirements of the ISO 9001:2008 standard.

The certificate was issued by IQNet (International Certification Network) and the SIQ (Slovenian Institute of Quality and Metrology).

Asyst Electronic has been certified in the field of the following activities:
Development and production of embedded microcontroller development and test tools,embedded systems development, custom product development

Quality Policy

Activities of Asyst Electronic are related to technologically demanding areas of the electronics industry. The majority of the renowned manufacturers of car electronic, avionic, medical, and others belong to our list of satisfied customers. As your technological partner Asyst Electronic offers expert knowledge based on more than 23 years of experience with embedded systems. We are pioneers in emulation and debug technology for 8-/16-/32-bit microcontroller architectures and FPGA based emulator hardware tools. We fulfil our obligation for an efficient, secure and fast development of your embedded systems application.

More than 25 employees follow further principles:

Know and learn on a daily basis what is important and pass on this expertise.
The problems and demands of our clients are a challenge for our employees. Their passion and creativity constantly produce new ideas.
Knowledge and tools are created in a process.
Working and learning are one.To think beyond the goal is obligatory.
Openness is a principle.Hierarchies are flat, information belongs to everyone.
Only those who think new thoughts can create new things and realise their ideas.

A business relationship between Asyst Electronic and a customer is a global, world-wide partnership to provide high quality hardware and software tool solutions in-time. Being pro-active, knowing about the partner’s challenges and exchanging knowledge adds value to this partnership.To be prepared for the future means: to observe each day anew, to see how the world is changing and to adapt to the new situation. Never stop learning, always be curious – that is our commitment.